查詢教學大綱與進度

教學大綱與進度

課程基本資料：

學年期課號課程名稱階段學分時數修教師班級人撤備註

114-1 349261 電腦輔助積體電路系統設計實務 1 3.0 3 ★ 宋國明電機所
電資外生所
半導體學位學程 119 0 電機碩班、半導體學位學程合開

學年期	課號	課程名稱	階段	學分	時數	修	教師	班級	人	撤	備註
114-1	349261	電腦輔助積體電路系統設計實務	1	3.0	3	★	宋國明	電機所電資外生所半導體學位學程	119	0	電機碩班、半導體學位學程合開

教學大綱與進度：

教師姓名宋國明　教師諮商時間(Office Hours)

Email gmsung@ntut.edu.tw

最後更新時間 2025-05-28 09:37:47

課程大綱 Students will learn how to design VLSI circuits and systems based on a standard VLSI system design flow, where various electronic design automation (EDA) tools will be used extensively in the semester. Those EDA tools includes analog and digital circuits and systems. The main purpose of this course includes the following: 1. VLSI Introduction. 2. Manufacturing Process. 3. MOSFET Devices. 4. MOSFET Wires. 5. Hspice Software. 6. Hspice Simulation. 7. Analog IC Layout and Practice. 8. Verilog-HDL. 9. Synthesis. 10. Design for Testability and Automatic Test Pattern Generation. 11. Static Timing Analysis. 12. Placement and Routing. 13. Design Rule Check, Layout Versus Schematic. 14. Layout Parasitic Extraction and Simulation. 15. Design Verification. 16. Project Presentation.

課程進度 Week 1 VLSI Introduction. Week 2 Manufacturing Process. Week 3 MOSFET Devices. Week 4 MOSFET Wires. Week 5 Hspice Software. Week 6 Hspice Simulation. Week 7 Hspice Examples Week 8 Analog IC Layout and Practice. Week 9 Verilog-HDL. Week 10 Synthesis. Week 11 Design for Testability and Automatic Test Pattern Generation. Week 12 Static Timing Analysis. Week 13 Placement and Routing. Week 14 Design Rule Check, Layout Versus Schematic. Week 15 Layout Parasitic Extraction and Simulation. Week 16 Smith Chart Simulation Week 17 ADS Software Week 18 ADS Examples

評量方式與標準 (1). General Performance 10%. (2). Homework 30%. (3). Midterm exam 30% (Open book). (3). Final exam 30%.

使用教材、參考書目或其他 【遵守智慧財產權觀念，請使用正版教科書，不得使用非法影印教科書】

使用外文原文書：是
Neil H. E. Weste and David Harris, “CMOS VLSI Design－A Circuit and System Perspective,”Third Edition, 2005. 偉明圖書有限公司 (www.wmbook.com.tw, TEL：2363-8586, 2363-6567, ISBN：0-321-14901-7)

課程諮詢管道 1. If needed, the curricular consultation takes place by distance learning with Google Meet.
2. The entrance code will be assigned.
3. Contact information: TEL (02)27712171#2121, Mobile 0939-941496, and Email: gmsung@ntut.edu.tw。

延伸教學與資源

課程對應SDGs指標 SDG3：良好健康和福祉（Good Health and Well-being）
SDG4：優質教育（Quality Education）
SDG8：尊嚴就業與經濟發展（Decent Work and Economic Growth）
SDG9：產業創新與基礎設施（Industry, Innovation and Infrastructure）

課程是否導入AI ● 使用生成式AI作為教學過程的輔助工具（Use generative AI tools as an aid to the teaching process）
● 鼓勵學生使用生成式AI工具（Encourage students to use generative AI tools）

備註 The curricular consultation takes place by distance learning with Google Meet. The entrance code will be assigned. (1). Teaching is completed with Google Meet. (2). Mid-term or final tests may be completed with distance testing. (3). If possible, this course has many homework.

教師姓名	宋國明　教師諮商時間(Office Hours)
Email	gmsung@ntut.edu.tw
最後更新時間	2025-05-28 09:37:47
課程大綱	Students will learn how to design VLSI circuits and systems based on a standard VLSI system design flow, where various electronic design automation (EDA) tools will be used extensively in the semester. Those EDA tools includes analog and digital circuits and systems. The main purpose of this course includes the following: 1. VLSI Introduction. 2. Manufacturing Process. 3. MOSFET Devices. 4. MOSFET Wires. 5. Hspice Software. 6. Hspice Simulation. 7. Analog IC Layout and Practice. 8. Verilog-HDL. 9. Synthesis. 10. Design for Testability and Automatic Test Pattern Generation. 11. Static Timing Analysis. 12. Placement and Routing. 13. Design Rule Check, Layout Versus Schematic. 14. Layout Parasitic Extraction and Simulation. 15. Design Verification. 16. Project Presentation.
課程進度	Week 1 VLSI Introduction. Week 2 Manufacturing Process. Week 3 MOSFET Devices. Week 4 MOSFET Wires. Week 5 Hspice Software. Week 6 Hspice Simulation. Week 7 Hspice Examples Week 8 Analog IC Layout and Practice. Week 9 Verilog-HDL. Week 10 Synthesis. Week 11 Design for Testability and Automatic Test Pattern Generation. Week 12 Static Timing Analysis. Week 13 Placement and Routing. Week 14 Design Rule Check, Layout Versus Schematic. Week 15 Layout Parasitic Extraction and Simulation. Week 16 Smith Chart Simulation Week 17 ADS Software Week 18 ADS Examples
評量方式與標準	(1). General Performance 10%. (2). Homework 30%. (3). Midterm exam 30% (Open book). (3). Final exam 30%.
使用教材、參考書目或其他	【遵守智慧財產權觀念，請使用正版教科書，不得使用非法影印教科書】使用外文原文書：是 Neil H. E. Weste and David Harris, “CMOS VLSI Design－A Circuit and System Perspective,”Third Edition, 2005. 偉明圖書有限公司 (www.wmbook.com.tw, TEL：2363-8586, 2363-6567, ISBN：0-321-14901-7)
課程諮詢管道	1. If needed, the curricular consultation takes place by distance learning with Google Meet. 2. The entrance code will be assigned. 3. Contact information: TEL (02)27712171#2121, Mobile 0939-941496, and Email: gmsung@ntut.edu.tw。
延伸教學與資源
課程對應SDGs指標	SDG3：良好健康和福祉（Good Health and Well-being） SDG4：優質教育（Quality Education） SDG8：尊嚴就業與經濟發展（Decent Work and Economic Growth） SDG9：產業創新與基礎設施（Industry, Innovation and Infrastructure）
課程是否導入AI	● 使用生成式AI作為教學過程的輔助工具（Use generative AI tools as an aid to the teaching process） ● 鼓勵學生使用生成式AI工具（Encourage students to use generative AI tools）
備註	The curricular consultation takes place by distance learning with Google Meet. The entrance code will be assigned. (1). Teaching is completed with Google Meet. (2). Mid-term or final tests may be completed with distance testing. (3). If possible, this course has many homework.