Course Syllabus

Course Information：

Year-Semester Course Number Course Name Phase Credits Hours Required/Elective Instructor Class Student NO. Withdraw Note

Fall Semester
Year 2025 347805 Introduction to VLSI Design 1 3.0 3 ★ LEE,MING-CHE 4EN3A
4EN3B 35 0 電子大三合開

Year-Semester	Course Number	Course Name	Phase	Credits	Hours	Required/Elective	Instructor	Class	Student NO.	Withdraw	Note
Fall Semester Year 2025	347805	Introduction to VLSI Design	1	3.0	3	★	LEE,MING-CHE	4EN3A 4EN3B	35	0	電子大三合開

Course Plan：

Instructor LEE,MING-CHE　Office Hours

Email minglee@ntut.edu.tw

Last Updated 2025-05-23 12:08:38

Course Objective 1.Introduction to VLSI Design 2.Introduction to EDA tools (ADFT 16nm FinFET) 3.Circuit/System simulation 4.Layout drawing/verifications (DRC) 5.VLSI Design & Testing Techniques

Course Schedule week 1 Course Introduction week 2 Process Overview week 3 Design environment & Simulation week 4-5 Layout Introduction week 6 Laker & Calibre DRC week 7 Various Inverters week 8 Transient responses week 9 Mid-term project week 10 Combinational Circuits week 11 Arithmetic circuits week 12 Sequential Circuits week 13 Dynamic logic week 14-15 Memories week 16 VLSI Testing Week 17 Low-power techniques week 18 Final project

Evaluation and grading policy Attendance: 20% Homework: 20% Mid-term project: 30% Final project: 30%

Materials All right reserved. Do not reproduce without permission.

Foreign-language textbooks:No
(1) Sung-Mo. Kang and Yusuf Leblebici, “CMOS Integrated Circuits – Analysis and Design”, McGraw-Hill (2) Jan M. Rabaey, “Digital Integrated Circuits”, Prentice Hall (3) Michael L. Bushnell and Vishwani D. Agrawal, "Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits," Kluwer Academic Publishers

The access to curricular consultation (1)辦公室: 綜科311-1室
(2)Office Hours: 如系統公告
(3)Email: minglee@ntut.edu.tw

The course corresponds to the SDGs SDG1：消除貧窮（No Poverty）
SDG4：優質教育（Quality Education）

Does the course incorporate AI AI2：鼓勵學生使用生成式AI工具（Encourage students to use generative AI tools）

Note
(1)本課程將以英文授課，內容將包含積體電路設計流程中大部分的tool使用教學，歡迎有興趣的同學多加利用選修。
(2)電路設計與模擬相關軟體受智慧財產權相關法律所保護，請修課同學們務必遵守保密協定，切勿對軟體之任何相關畫面進行截圖、照相或錄影，亦不可將相關技術文件內所含之內容外洩，以觸法。

Instructor	LEE,MING-CHE　Office Hours
Email	minglee@ntut.edu.tw
Last Updated	2025-05-23 12:08:38
Course Objective	1.Introduction to VLSI Design 2.Introduction to EDA tools (ADFT 16nm FinFET) 3.Circuit/System simulation 4.Layout drawing/verifications (DRC) 5.VLSI Design & Testing Techniques
Course Schedule	week 1 Course Introduction week 2 Process Overview week 3 Design environment & Simulation week 4-5 Layout Introduction week 6 Laker & Calibre DRC week 7 Various Inverters week 8 Transient responses week 9 Mid-term project week 10 Combinational Circuits week 11 Arithmetic circuits week 12 Sequential Circuits week 13 Dynamic logic week 14-15 Memories week 16 VLSI Testing Week 17 Low-power techniques week 18 Final project
Evaluation and grading policy	Attendance: 20% Homework: 20% Mid-term project: 30% Final project: 30%
Materials	All right reserved. Do not reproduce without permission. Foreign-language textbooks:No (1) Sung-Mo. Kang and Yusuf Leblebici, “CMOS Integrated Circuits – Analysis and Design”, McGraw-Hill (2) Jan M. Rabaey, “Digital Integrated Circuits”, Prentice Hall (3) Michael L. Bushnell and Vishwani D. Agrawal, "Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits," Kluwer Academic Publishers
The access to curricular consultation	(1)辦公室: 綜科311-1室 (2)Office Hours: 如系統公告 (3)Email: minglee@ntut.edu.tw
The course corresponds to the SDGs	SDG1：消除貧窮（No Poverty） SDG4：優質教育（Quality Education）
Does the course incorporate AI	AI2：鼓勵學生使用生成式AI工具（Encourage students to use generative AI tools）
Note	(1)本課程將以英文授課，內容將包含積體電路設計流程中大部分的tool使用教學，歡迎有興趣的同學多加利用選修。 (2)電路設計與模擬相關軟體受智慧財產權相關法律所保護，請修課同學們務必遵守保密協定，切勿對軟體之任何相關畫面進行截圖、照相或錄影，亦不可將相關技術文件內所含之內容外洩，以觸法。