Course Syllabus

Course Information：

Year-Semester Course Number Course Name Phase Credits Hours Required/Elective Instructor Class Student NO. Withdraw Note

Spring Semester
Year 2021 288573 Design and Practice of Integrated Circuit Layout 1 3.0 3 ★ LEE NEW-TA
Hsin-Hui Hu
Pang-Jung Liu 產業接軌課程(研)
GEE
ECE 25 2 加退選開放加選,電機、電子四和電機所、電子所合開

Year-Semester	Course Number	Course Name	Phase	Credits	Hours	Required/Elective	Instructor	Class	Student NO.	Withdraw	Note
Spring Semester Year 2021	288573	Design and Practice of Integrated Circuit Layout	1	3.0	3	★	LEE NEW-TA Hsin-Hui Hu Pang-Jung Liu	產業接軌課程(研) GEE ECE	25	2	加退選開放加選,電機、電子四和電機所、電子所合開

Course Plan：

Instructor LEE NEW-TA

Email wtlee@ntut.edu.tw

Last Updated 2021-01-12 16:24:51

Course Objective 本課程將介紹layout(佈局)和先進製程的密切關係，從佈局設計流程之基本觀念及 EDA 軟體的使用到更深入探討 layout 的架構設計和先進製程中layout遇到的瓶頸和困難；課程內將教授並探討不同實務架構的layout問題和解決方法，其中包含標準電路元件(Standard cell)、記憶體 (Memory) 、類比暨混合信號 (Analog and mixed signal)，最後透過本課程的期末報告練習，可了解實務界中layout design的挑戰和對未來先進製程的重要性並提升學生往後在業界的競爭力。 Integrated circuit (IC) layout design plays a big role in the current semiconductor industry, especially for the most advanced technology. This course explores the big task of IC layout design and the practical problems with solutions in different layout fields, such as standard cell design, memory design, analog design, and mixed-signal field. This course introduces the students to the process, tools, and methodology of IC layout design. Moreover, it also provides the students with the insight into the exciting field of semiconductor technology and electronic devices. By going through the final project and competition, students will be brought to the next level of layout field and will have a wider vision to realize IC layout design.

Course Schedule 1). 積體電路製程概論 (2 weeks) 2). 積體電路設計流程 (1 week) 3). 基本數位邏輯電路介紹 (1 week) 4). 積體電路佈局設計流程及型態介紹 (1 week) ---------------------------- tsmc 師資授課 --------------- 5). 積體電路佈局設計設計準則介紹與及軟體使用 (2 weeks) 6). 期中考 (1 week) 7). 標準元件電路佈局設計介紹 (2 weeks) 8). 記憶元件電路佈局設計介紹 (2 weeks) 9). 類比元件電路佈局設計介紹 (2 weeks) 10).佈局設計實作計畫與專題報告 (3 weeks) 11). 授課老師回饋與建議/TSMC頒獎 (1 week)

Evaluation and grading policy Assignment (15%) Midterm (30%) Final Exam (25%) Final Project (30%)

Materials All right reserved. Do not reproduce without permission.

Foreign-language textbooks:No
自製教材

The access to curricular consultation

Note
　

Instructor	LEE NEW-TA
Email	wtlee@ntut.edu.tw
Last Updated	2021-01-12 16:24:51
Course Objective	本課程將介紹layout(佈局)和先進製程的密切關係，從佈局設計流程之基本觀念及 EDA 軟體的使用到更深入探討 layout 的架構設計和先進製程中layout遇到的瓶頸和困難；課程內將教授並探討不同實務架構的layout問題和解決方法，其中包含標準電路元件(Standard cell)、記憶體 (Memory) 、類比暨混合信號 (Analog and mixed signal)，最後透過本課程的期末報告練習，可了解實務界中layout design的挑戰和對未來先進製程的重要性並提升學生往後在業界的競爭力。 Integrated circuit (IC) layout design plays a big role in the current semiconductor industry, especially for the most advanced technology. This course explores the big task of IC layout design and the practical problems with solutions in different layout fields, such as standard cell design, memory design, analog design, and mixed-signal field. This course introduces the students to the process, tools, and methodology of IC layout design. Moreover, it also provides the students with the insight into the exciting field of semiconductor technology and electronic devices. By going through the final project and competition, students will be brought to the next level of layout field and will have a wider vision to realize IC layout design.
Course Schedule	1). 積體電路製程概論 (2 weeks) 2). 積體電路設計流程 (1 week) 3). 基本數位邏輯電路介紹 (1 week) 4). 積體電路佈局設計流程及型態介紹 (1 week) ---------------------------- tsmc 師資授課 --------------- 5). 積體電路佈局設計設計準則介紹與及軟體使用 (2 weeks) 6). 期中考 (1 week) 7). 標準元件電路佈局設計介紹 (2 weeks) 8). 記憶元件電路佈局設計介紹 (2 weeks) 9). 類比元件電路佈局設計介紹 (2 weeks) 10).佈局設計實作計畫與專題報告 (3 weeks) 11). 授課老師回饋與建議/TSMC頒獎 (1 week)
Evaluation and grading policy	Assignment (15%) Midterm (30%) Final Exam (25%) Final Project (30%)
Materials	All right reserved. Do not reproduce without permission. Foreign-language textbooks:No 自製教材
The access to curricular consultation
Note