Course Syllabus

Course Information：

Year-Semester	Course Number	Course Name	Phase	Credits	Hours	Required/Elective	Instructor	Class	Student NO.	Withdraw	Note
Spring Semester Year 2026	354410	Digital System Design Lab.	1	1.0	3	▲	Kuo,Hung-Yuan	4EN3A 4EN3B	72	0	電子大三合開

Course Plan：

Instructor	Kuo,Hung-Yuan　Office Hours
Email	hungyuankuo@ntut.edu.tw
Last Updated	2026-02-26 10:03:00
Course Objective	本課程內容包括邏輯閘的特性與功能測試，能利用積體電路完成各種基礎邏輯電路的組裝及設計，並能利用電子儀器進行量測、檢修。探討最佳化組合邏輯之演算法，可規劃邏輯元件，組合邏輯之VLSI設計，使用MSI與標準電路元件設計多層邏輯，使用閘陣列設計，循序邏輯之元件，循序邏輯之分析與合成，VLSI之設計與測試技巧，各種CAD軟體工具介紹。基礎邏輯閘實驗、組合邏輯實驗、加法器及減法器實驗、組合邏輯應用實驗、正反器邏輯實驗、循序邏輯電路應用實驗。 1.Properties and function tests of logic gates. 2. Implementations of and designs of basic logic circuits using ICs. 3.Algorithms for the optimization of combinational logic circuits. 4.Programmable logic devices. 5.VLSI design of combinational logic circuits. 6.Multi-layer logic circuits using MSI and standard circuit elements. 7.Gate array design. 8.Sequential Logic components. 9.Analysis and synthesis of sequential Logic circuits. 10. Technologies of VLSI design and test. 11. CAD software tools. 12.Basic logic gate experiments. 13.Combinational logic experiments. 14. Adder and subtractor experiments. 15. Combinational logic application experiments. 16. Flip-flop experiments. 17. Sequential circuit application experiments.
Course Schedule	01.Introduction to Digital System Design 02.Concurrent Code and Devices Design 03.Simulation with VHDL Testbench 04.Testing with Pattern Generator and Digital Analyzer 05.Sequential Code and Devices Design 06.Signal and Variables 07.Package and Component for System design 08.Function and Procedure in System Design 09.Midterm Exam. 10.Design with State Machines 11.FSM Model 12.Basic DisplaysMemory Circuits 13.Memory CircuitsSerial Communications Circuits 14.Serial Communications CircuitsVGA Video Interfaces 15.VGA Video InterfacesDVI Video Interfaces 16.DVI Video Interfaces 17.Memoy and NIOS soft CPU and FPGA 18.Final Exam.
Evaluation and grading policy	平時: 40% 期中考: 30% 期末專案: 30%
Materials	All right reserved. Do not reproduce without permission. Foreign-language textbooks:Yes 1. Text Book: Circuit Design and Simulation with VHDL 2nd Edition Volnei A.pedroni / The MIT Press 2. Reference Book: Finite State Machine in Hardware Volnei A.pedroni / The MIT Press 3. Reference Book: Digital Systems Design Using Verilog Cengage Learning
The access to curricular consultation	研究室：綜科館 209-3 室 E-mail : hungyuankuo@mail.ntut.edu.tw
Expanding teaching and resources	● 無 (None)
The course corresponds to the SDGs	SDG9：產業創新與基礎設施（Industry, Innovation and Infrastructure）
Does the course incorporate AI	● 使用生成式AI作為教學過程的輔助工具（Use generative AI tools as an aid to the teaching process） ● 鼓勵學生使用生成式AI工具（Encourage students to use generative AI tools）
Note	上課教材 : 北科i學園+ (校園入口網站 => 教務系統 => 北科i學園PLUS => 我的課程 => 學習互動區 => 教材 上課作業 : 北科i學園+ (校園入口網站 => 教務系統 => 北科i學園PLUS => 我的課程 => 評量區 => 作業/報告 Teams團隊代碼:lmaz378 雲端資料:https://drive.google.com/drive/folders/1nWi7QHE59Vw5OK3OWB68ojXgpFIvuy0h?usp=drive_link