Course Syllabus

Course Information：

Year-Semester Course Number Course Name Phase Credits Hours Required/Elective Instructor Class Student NO. Withdraw Note

Spring Semester
Year 2026 355219 Microprocessor-Based Systems 1 3.0 3 ▲ Yen-Lin Chen 4CSIE2 62 0 　

Year-Semester	Course Number	Course Name	Phase	Credits	Hours	Required/Elective	Instructor	Class	Student NO.	Withdraw	Note
Spring Semester Year 2026	355219	Microprocessor-Based Systems	1	3.0	3	▲	Yen-Lin Chen	4CSIE2	62	0

Course Plan：

Instructor Yen-Lin Chen　Office Hours

Email ylchen@ntut.edu.tw

Last Updated 2025-12-18 15:29:08

Course Objective 本課程接續計算機組織，介紹現今行動平台處理器之之組成原理與設計概念，並且結合VHDL硬體描述語言與FPGA實驗平台，修課同學可以學習如何使用FPGA平台自行設計處理器，並可應用於現代主流手機與手持裝置處理器架構分析與開發，與開發人工智慧AI相關處理器應用。

Course Schedule Introduction to CAD Tools – VHDL Language (2 weeks) Combinational Logic Systems using VHDL (3 weeks) Synchronous Sequential Circuits and Finite State Machines using VHDL (3 weeks) Advanced Topics in VHDL Design (3 weeks) Design the Components of a Processor using VHDL (2 weeks) Design the Processor's Datapath and Control on FPGA system (3 weeks)

Evaluation and grading policy Lab Practices & Reports & Course Participation: 60% Finishing lab practice in the course time will get bonus scores. Midterm on-line exam: 20% Final Project: 20%

Materials All right reserved. Do not reproduce without permission.

Foreign-language textbooks:Yes
David A. Patterson and John L. Hennessy, “Computer Organization and Design: The Hardware / Software Interface”, 5th Ed., Morgan Kaufmann, 2013. ISBN: 9780123744937, 東華書局代理. Lab. Materials 自編實驗講義教材 Major references

The access to curricular consultation 授課教師email: ylchen@mail.ntut.edu.tw
開學第一週將公告課程FB社群。

Expanding teaching and resources

The course corresponds to the SDGs SDG4：優質教育（Quality Education）
SDG9：產業創新與基礎設施（Industry, Innovation and Infrastructure）

Does the course incorporate AI ● 無（None）

Note
　

Instructor	Yen-Lin Chen　Office Hours
Email	ylchen@ntut.edu.tw
Last Updated	2025-12-18 15:29:08
Course Objective	本課程接續計算機組織，介紹現今行動平台處理器之之組成原理與設計概念，並且結合VHDL硬體描述語言與FPGA實驗平台，修課同學可以學習如何使用FPGA平台自行設計處理器，並可應用於現代主流手機與手持裝置處理器架構分析與開發，與開發人工智慧AI相關處理器應用。
Course Schedule	Introduction to CAD Tools – VHDL Language (2 weeks) Combinational Logic Systems using VHDL (3 weeks) Synchronous Sequential Circuits and Finite State Machines using VHDL (3 weeks) Advanced Topics in VHDL Design (3 weeks) Design the Components of a Processor using VHDL (2 weeks) Design the Processor's Datapath and Control on FPGA system (3 weeks)
Evaluation and grading policy	Lab Practices & Reports & Course Participation: 60% Finishing lab practice in the course time will get bonus scores. Midterm on-line exam: 20% Final Project: 20%
Materials	All right reserved. Do not reproduce without permission. Foreign-language textbooks:Yes David A. Patterson and John L. Hennessy, “Computer Organization and Design: The Hardware / Software Interface”, 5th Ed., Morgan Kaufmann, 2013. ISBN: 9780123744937, 東華書局代理. Lab. Materials 自編實驗講義教材 Major references
The access to curricular consultation	授課教師email: ylchen@mail.ntut.edu.tw 開學第一週將公告課程FB社群。
Expanding teaching and resources
The course corresponds to the SDGs	SDG4：優質教育（Quality Education） SDG9：產業創新與基礎設施（Industry, Innovation and Infrastructure）
Does the course incorporate AI	● 無（None）
Note