Course Syllabus

Course Information：

Year-Semester Course Number Course Name Phase Credits Hours Required/Elective Instructor Class Student NO. Withdraw Note

Fall Semester
Year 2026 362978 Digital Logic Design 1 3.0 3 ▲ To-Po Wang 4EN1A 0 0 英語授課，希望排在二教201、207、301或307

Year-Semester	Course Number	Course Name	Phase	Credits	Hours	Required/Elective	Instructor	Class	Student NO.	Withdraw	Note
Fall Semester Year 2026	362978	Digital Logic Design	1	3.0	3	▲	To-Po Wang	4EN1A	0	0	英語授課，希望排在二教201、207、301或307

Course Plan：

Instructor To-Po Wang　Office Hours

Email tpwang@ntut.edu.tw

Last Updated 2026-06-05 07:37:40

Course Objective Ch1 Basic Principles of Digital Systems Ch2 Logic Functions and Gates Ch3 Boolean Algebra and Combinational Logic Ch4 Introduction to PLDs and Quartus II Ch5 Introduction to VHDL Ch6 Combinational Logic Functions Ch7 Digital Arithmetic and Arithmetic Circuits Ch8 Introduction to Sequential Logic Ch9 Counters and Shift Registers

Course Schedule Ch1 Basic Principles of Digital Systems Ch2 Logic Functions and Gates Ch3 Boolean Algebra and Combinational Logic Ch4 Introduction to PLDs and Quartus II Ch5 Introduction to VHDL Ch6 Combinational Logic Functions Ch7 Digital Arithmetic and Arithmetic Circuits Ch8 Introduction to Sequential Logic Ch9 Counters and Shift Registers

Evaluation and grading policy Homework and Tests (Quiz, Pop Quiz, ...): 30% Midterm: 30% Final Exam: 30% Class Participation: 10%

Materials All right reserved. Do not reproduce without permission.

Foreign-language textbooks:Yes
Teaching material: Slides Reference book: Digital Design with CPLD Applications and VHDL, 2nd Edition. by Dueck

The access to curricular consultation Please contact teacher.

Expanding teaching and resources ● 無 (None)

The course corresponds to the SDGs SDG9：產業創新與基礎設施（Industry, Innovation and Infrastructure）

Does the course incorporate AI ● 無（None）

Note
　

Instructor	To-Po Wang　Office Hours
Email	tpwang@ntut.edu.tw
Last Updated	2026-06-05 07:37:40
Course Objective	Ch1 Basic Principles of Digital Systems Ch2 Logic Functions and Gates Ch3 Boolean Algebra and Combinational Logic Ch4 Introduction to PLDs and Quartus II Ch5 Introduction to VHDL Ch6 Combinational Logic Functions Ch7 Digital Arithmetic and Arithmetic Circuits Ch8 Introduction to Sequential Logic Ch9 Counters and Shift Registers
Course Schedule	Ch1 Basic Principles of Digital Systems Ch2 Logic Functions and Gates Ch3 Boolean Algebra and Combinational Logic Ch4 Introduction to PLDs and Quartus II Ch5 Introduction to VHDL Ch6 Combinational Logic Functions Ch7 Digital Arithmetic and Arithmetic Circuits Ch8 Introduction to Sequential Logic Ch9 Counters and Shift Registers
Evaluation and grading policy	Homework and Tests (Quiz, Pop Quiz, ...): 30% Midterm: 30% Final Exam: 30% Class Participation: 10%
Materials	All right reserved. Do not reproduce without permission. Foreign-language textbooks:Yes Teaching material: Slides Reference book: Digital Design with CPLD Applications and VHDL, 2nd Edition. by Dueck
The access to curricular consultation	Please contact teacher.
Expanding teaching and resources	● 無 (None)
The course corresponds to the SDGs	SDG9：產業創新與基礎設施（Industry, Innovation and Infrastructure）
Does the course incorporate AI	● 無（None）
Note