Course Syllabus

Course Information：

Year-Semester Course Number Course Name Phase Credits Hours Required/Elective Instructor Class Student NO. Withdraw Note

Spring Semester
Year 2025 345604 AI-on-Chip 1 3.0 3 ★ CHIU HUNG WEI ECE 28 2 　

Year-Semester	Course Number	Course Name	Phase	Credits	Hours	Required/Elective	Instructor	Class	Student NO.	Withdraw	Note
Spring Semester Year 2025	345604	AI-on-Chip	1	3.0	3	★	CHIU HUNG WEI	ECE	28	2

Course Plan：

Instructor CHIU HUNG WEI　Office Hours

Email hwchiu@ntut.edu.tw

Last Updated 2024-12-21 12:36:03

Course Objective 這門課程深入探討將AI技術直接整合至硬體的過程。課程從AI晶片的基本概念開始，進一步探討各種AI的數位、類比及混合訊號架構。課程內容涵蓋了對神經網路模型映射到晶片硬體的過程及優化。重要的一環是神經網路編譯器的設計與優化，並輔以實務工具和考量以實現高效的AI晶片設計。課程還探討了AI晶片的當前應用及AI硬體發展的未來趨勢。課程以學生專題為導向，將所學知識應用於創新的AI晶片解決方案。此課程旨在為學生提供在不斷進化的AI硬體領域中取得成功所需的技能和知識。 This course, titled "AI-on-Chip Design: Architectures and Applications," offers a deep dive into how AI technologies are integrated directly onto hardware. It begins with fundamental concepts of AI-on-Chip, moving into the intricacies of digital, analog, and mixed-signal architectures tailored for AI applications. The curriculum includes a thorough examination of neural network models, focusing on their optimization and the critical process of mapping these models onto hardware. A significant portion is dedicated to the design and optimization of neural network compilers, supplemented by practical insights into the tools and considerations necessary for efficient AI chip design. The course also explores current applications of AI-on-Chip and anticipates future trends that could reshape AI hardware development. It culminates in a project presentation where students apply what they've learned to create innovative AI-on-Chip solutions. This course equips students with the skills and knowl

Course Schedule AI-Chip and Laboratories Course Outline 1. Introduction to AI and AI-Chip Design • Overview of AI Hardware Evolution: GPUs, TPUs, and AI-specific hardware • Introduction to AI-Chip Architectures: Digital, analog, and mixed-signal approaches • Overview of AI Workloads and Requirements: Computational demands and data processing needs for AI models 2. Fundamentals of Chip Design • Digital Circuit Design Basics: Logic gates, combinational and sequential circuits • Analog Circuit Design: Amplifiers, filters, and signal conditioning • Mixed-Signal Circuit Design: ADC, DAC, and their role in AI processing 3. AI Hardware Architectures • Processor Design for AI: Instruction sets, RISC vs. CISC for AI • Accelerator Design: Introduction to accelerators like GPUs, TPUs, and NPUs • Memory Architectures: SRAM, DRAM, and memory hierarchies in AI chips • Interconnects and Data Transfer Protocols: High-speed data transfer, PCIe, NVLink, and memory coherence 4. Neural Network Processors • Basics of Neural Network Architecture: Feed-forward, convolutional, and recurrent networks • Designing Efficient NN Hardware: Specialized multipliers, accumulators, and activation functions • Optimization Techniques: Quantization, pruning, and sparsity to enhance performance 5. AI-Chip Laboratory Setup and Tools • EDA Tools Overview: Key tools for IC design and simulation (e.g., Cadence, Synopsys, MATLAB/Simulink) • Hardware Descriptive Languages (HDL): VHDL, Verilog, and SystemVerilog basics for AI-chip design • Simulation and Testing Tools: Using simulators to test functionality, power, and thermal profiles 6. Compiler and Software Stacks for AI Hardware • NN Compiler Overview: Compilation techniques for neural network models on hardware • Firmware and Driver Development: Basic driver development for AI hardware • Software-Hardware Co-design: Balancing computational loads between hardware and software layers 7. Real-World Applications of AI-Chips • Edge AI Applications: Low-power, real-time AI applications and the role of AI chips • Data Center Applications: High-performance AI chips for cloud infrastructure • Specialized AI Hardware in Industry: Robotics, automotive, and medical applications 8. Practical Laboratory Work • Lab 1: Basic Digital Logic Circuit Design and Simulation • Lab 2: Analog Signal Processing and Amplification Techniques • Lab 3: Mixed-Signal Processing and ADC/DAC Interfacing • Lab 4: Implementing Neural Network Inference on FPGA • Lab 5: Profiling AI Workloads and Optimizing Performance • Lab 6: Developing and Testing Custom NN Layers for Hardware Execution

Evaluation and grading policy Homeworks (60%) Capstone Project (40%) • Project Development: Students propose and develop a small-scale AI-chip-related project • Integration and Testing: Practical work on implementation, testing, and performance evaluation • Presentation and Feedback: Final project presentation and feedback session

Materials All right reserved. Do not reproduce without permission.

Foreign-language textbooks:Yes
Github Matab Python

The access to curricular consultation 可以使用Line 或Teams 跟老師直接連絡。

Expanding teaching and resources

The course corresponds to the SDGs SDG4：優質教育（Quality Education）
SDG9：產業創新與基礎設施（Industry, Innovation and Infrastructure）

Does the course incorporate AI

Note
需會使用python 及學過超大型積體電路、
最好修過 AI相關課程及演算法課程。

Instructor	CHIU HUNG WEI　Office Hours
Email	hwchiu@ntut.edu.tw
Last Updated	2024-12-21 12:36:03
Course Objective	這門課程深入探討將AI技術直接整合至硬體的過程。課程從AI晶片的基本概念開始，進一步探討各種AI的數位、類比及混合訊號架構。課程內容涵蓋了對神經網路模型映射到晶片硬體的過程及優化。重要的一環是神經網路編譯器的設計與優化，並輔以實務工具和考量以實現高效的AI晶片設計。課程還探討了AI晶片的當前應用及AI硬體發展的未來趨勢。課程以學生專題為導向，將所學知識應用於創新的AI晶片解決方案。此課程旨在為學生提供在不斷進化的AI硬體領域中取得成功所需的技能和知識。 This course, titled "AI-on-Chip Design: Architectures and Applications," offers a deep dive into how AI technologies are integrated directly onto hardware. It begins with fundamental concepts of AI-on-Chip, moving into the intricacies of digital, analog, and mixed-signal architectures tailored for AI applications. The curriculum includes a thorough examination of neural network models, focusing on their optimization and the critical process of mapping these models onto hardware. A significant portion is dedicated to the design and optimization of neural network compilers, supplemented by practical insights into the tools and considerations necessary for efficient AI chip design. The course also explores current applications of AI-on-Chip and anticipates future trends that could reshape AI hardware development. It culminates in a project presentation where students apply what they've learned to create innovative AI-on-Chip solutions. This course equips students with the skills and knowl
Course Schedule	AI-Chip and Laboratories Course Outline 1. Introduction to AI and AI-Chip Design • Overview of AI Hardware Evolution: GPUs, TPUs, and AI-specific hardware • Introduction to AI-Chip Architectures: Digital, analog, and mixed-signal approaches • Overview of AI Workloads and Requirements: Computational demands and data processing needs for AI models 2. Fundamentals of Chip Design • Digital Circuit Design Basics: Logic gates, combinational and sequential circuits • Analog Circuit Design: Amplifiers, filters, and signal conditioning • Mixed-Signal Circuit Design: ADC, DAC, and their role in AI processing 3. AI Hardware Architectures • Processor Design for AI: Instruction sets, RISC vs. CISC for AI • Accelerator Design: Introduction to accelerators like GPUs, TPUs, and NPUs • Memory Architectures: SRAM, DRAM, and memory hierarchies in AI chips • Interconnects and Data Transfer Protocols: High-speed data transfer, PCIe, NVLink, and memory coherence 4. Neural Network Processors • Basics of Neural Network Architecture: Feed-forward, convolutional, and recurrent networks • Designing Efficient NN Hardware: Specialized multipliers, accumulators, and activation functions • Optimization Techniques: Quantization, pruning, and sparsity to enhance performance 5. AI-Chip Laboratory Setup and Tools • EDA Tools Overview: Key tools for IC design and simulation (e.g., Cadence, Synopsys, MATLAB/Simulink) • Hardware Descriptive Languages (HDL): VHDL, Verilog, and SystemVerilog basics for AI-chip design • Simulation and Testing Tools: Using simulators to test functionality, power, and thermal profiles 6. Compiler and Software Stacks for AI Hardware • NN Compiler Overview: Compilation techniques for neural network models on hardware • Firmware and Driver Development: Basic driver development for AI hardware • Software-Hardware Co-design: Balancing computational loads between hardware and software layers 7. Real-World Applications of AI-Chips • Edge AI Applications: Low-power, real-time AI applications and the role of AI chips • Data Center Applications: High-performance AI chips for cloud infrastructure • Specialized AI Hardware in Industry: Robotics, automotive, and medical applications 8. Practical Laboratory Work • Lab 1: Basic Digital Logic Circuit Design and Simulation • Lab 2: Analog Signal Processing and Amplification Techniques • Lab 3: Mixed-Signal Processing and ADC/DAC Interfacing • Lab 4: Implementing Neural Network Inference on FPGA • Lab 5: Profiling AI Workloads and Optimizing Performance • Lab 6: Developing and Testing Custom NN Layers for Hardware Execution
Evaluation and grading policy	Homeworks (60%) Capstone Project (40%) • Project Development: Students propose and develop a small-scale AI-chip-related project • Integration and Testing: Practical work on implementation, testing, and performance evaluation • Presentation and Feedback: Final project presentation and feedback session
Materials	All right reserved. Do not reproduce without permission. Foreign-language textbooks:Yes Github Matab Python
The access to curricular consultation	可以使用Line 或Teams 跟老師直接連絡。
Expanding teaching and resources
The course corresponds to the SDGs	SDG4：優質教育（Quality Education） SDG9：產業創新與基礎設施（Industry, Innovation and Infrastructure）
Does the course incorporate AI
Note	需會使用python 及學過超大型積體電路、最好修過 AI相關課程及演算法課程。