Course Syllabus

Course Information：

Year-Semester Course Number Course Name Phase Credits Hours Required/Elective Instructor Class Student NO. Withdraw Note

Fall Semester
Year 2020 280841 CMOS VLSI Design 1 3.0 3 ★ Sung Guo-Ming GEE
IEECSG 6 0 ◎

Year-Semester	Course Number	Course Name	Phase	Credits	Hours	Required/Elective	Instructor	Class	Student NO.	Withdraw	Note
Fall Semester Year 2020	280841	CMOS VLSI Design	1	3.0	3	★	Sung Guo-Ming	GEE IEECSG	6	0	◎

Course Plan：

Instructor Sung Guo-Ming

Email gmsung@ntut.edu.tw

Last Updated 2020-06-12 16:59:29

Course Objective 瞭解CMOS 超大型積體電路之電路元件特性及其組合電路之分析與設計方法，其內容包含：金氧半電晶體電路特性分析、電路性能評估、電路模擬、組合電路設計、序向電路設計、設計方法分析、測試與驗證、CMOS案例討論與Verilog HDL設計等課程內容。 This course covers the electric specification, circuit analyses, and design methods of the CMOS VLSI. The contents of this course include: Circuit characterization, performance estimation, Circuit simulation, Combinational circuit, Sequential circuit, Design methodology, Testing and verification, CMOS case study, and Verilog HDL design.

Course Schedule
(Week 1-16) Week 1 Course introduction Week 2 CMOS Transistor Theory Week 3 Nonideal Transistor Theory Week 4 DC and Transient Response Week 5 Logic Effort Week 6 Power Week 7 Wires Week 8 SPICE Simulation (Homework 1) Week 9 Midterm exam: 30% Week 10-11 Circuit Families and Combinational Circuit Week 12-13 Sequential Circuit Design Week 14 Datapath Functional Units Week 15 Scaling and Economics Week 16 Circuit Pitfalls Week 17 Verilog HDL design (Homework 2) Week 18 Final exam: 30%

Evaluation and grading policy Coursework and Grading: Course grades will be based on the following work. The final weighting may be changed slightly. Class participation: 10% Homework: 30% Midterm exam: 30% Final exam: 30%

Materials All right reserved. Do not reproduce without permission.

Foreign-language textbooks:Yes
Neil H. E. Weste and David Harris, “CMOS VLSI Design－A Circuit and System Perspective,”Third Edition, 2005. 偉明圖書有限公司 (www.wmbook.com.tw, TEL：2363-8586, 2363-6567, ISBN：0-321-14901-7)

The access to curricular consultation

Expanding teaching and resources

The course corresponds to the SDGs

Does the course incorporate AI

Note
　

Instructor	Sung Guo-Ming
Email	gmsung@ntut.edu.tw
Last Updated	2020-06-12 16:59:29
Course Objective	瞭解CMOS 超大型積體電路之電路元件特性及其組合電路之分析與設計方法，其內容包含：金氧半電晶體電路特性分析、電路性能評估、電路模擬、組合電路設計、序向電路設計、設計方法分析、測試與驗證、CMOS案例討論與Verilog HDL設計等課程內容。 This course covers the electric specification, circuit analyses, and design methods of the CMOS VLSI. The contents of this course include: Circuit characterization, performance estimation, Circuit simulation, Combinational circuit, Sequential circuit, Design methodology, Testing and verification, CMOS case study, and Verilog HDL design.
Course Schedule (Week 1-16)	Week 1 Course introduction Week 2 CMOS Transistor Theory Week 3 Nonideal Transistor Theory Week 4 DC and Transient Response Week 5 Logic Effort Week 6 Power Week 7 Wires Week 8 SPICE Simulation (Homework 1) Week 9 Midterm exam: 30% Week 10-11 Circuit Families and Combinational Circuit Week 12-13 Sequential Circuit Design Week 14 Datapath Functional Units Week 15 Scaling and Economics Week 16 Circuit Pitfalls Week 17 Verilog HDL design (Homework 2) Week 18 Final exam: 30%
Evaluation and grading policy	Coursework and Grading: Course grades will be based on the following work. The final weighting may be changed slightly. Class participation: 10% Homework: 30% Midterm exam: 30% Final exam: 30%
Materials	All right reserved. Do not reproduce without permission. Foreign-language textbooks:Yes Neil H. E. Weste and David Harris, “CMOS VLSI Design－A Circuit and System Perspective,”Third Edition, 2005. 偉明圖書有限公司 (www.wmbook.com.tw, TEL：2363-8586, 2363-6567, ISBN：0-321-14901-7)
The access to curricular consultation
Expanding teaching and resources
The course corresponds to the SDGs
Does the course incorporate AI
Note