| Course Code | Course Name | Credits | Hours |
|---|---|---|---|
| 3603086 | Circuit Design with High-level Language Synthesis | 3.0 | 3 |
| Description | This course is concerned with the techniques of IC circuit design using high-level language and such that the students have the ability of VLSI architecture design using HDL. The major topics covered in this course are: 1、Introduction to PLD、FPGA and ASIC design 2、Introduction to hardware description language 3、System modeling 4、Module and port 5、Gate-level modeling 6、Dataflow modeling 7、Timing and delay modeling 8、Logic synthesis 9、Special project implementation | ||